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-rw-r--r--chip-data/chipNames.json560
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diff --git a/chip-data/chipNames.json b/chip-data/chipNames.json
new file mode 100644
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+++ b/chip-data/chipNames.json
@@ -0,0 +1,560 @@
+{
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+ "1039,6330":["SIS_CHIP_315"],
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+ "18CA,0042":["SIS_CHIP_315"],
+ "1106,3118":["VIA_PRO_GROUP_A"],
+ "1106,3230":["VIA_DX9_0"],
+ "1106,3157":["VIA_PRO_GROUP_A"],
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+ "5333,8A26":["S3_PROSAVAGE"],
+ "5333,8D01":["S3_TWISTER"],
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+ "5333,8D03":["S3_PROSAVAGEDDR"],
+ "5333,8D04":["S3_PROSAVAGEDDR"],
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+ "8086,712a":["Whitney"],
+ "8086,3576":["Brookdale"],
+ "8086,3582":["Springdale"],
+ "8086,2582":["Grantsdale"],
+ "8086,2782":["Grantsdale"],
+ "8086,2592":["Alviso"],
+ "8086,2792":["Alviso"],
+ "8086,2772":["Lakeport"],
+ "8086,2776":["Lakeport"],
+ "8086,27A2":["Calistoga"],
+ "8086,27A6":["Calistoga"],
+ "8086,27AE":["Calistoga"],
+ "8086,2972":["Broadwater"],
+ "8086,2973":["Broadwater"],
+ "8086,2992":["Broadwater"],
+ "8086,2993":["Broadwater"],
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+ "8086,29B3":["Bearlake"],
+ "8086,29C2":["Bearlake"],
+ "8086,29C3":["Bearlake"],
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+ "8086,A002":["Pineview"],
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+ "8086,2982":["Broadwater"],
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+ "8086,2A12":["Crestline"],
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+ "8086,2E43":["Eaglelake"],
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+ "8086,2E33":["Eaglelake"],
+ "8086,2E22":["Eaglelake"],
+ "8086,2E23":["Eaglelake"],
+ "8086,2A42":["Cantiga"],
+ "8086,2A43":["Cantiga"],
+ "8086,0042":["Clarkdale"],
+ "8086,0046":["Arrandale"],
+ "8086,0080":["Ivy Bridge"],
+ "8086,0000":["Larrabee"],
+ "8086,0102":["Sandy Bridge"],
+ "8086,0106":["Sandy Bridge"],
+ "8086,0112":["Sandy Bridge"],
+ "8086,0116":["Sandy Bridge"],
+ "8086,0122":["Sandy Bridge"],
+ "8086,0126":["Sandy Bridge"],
+ "8086,010A":["Sandy Bridge"],
+ "15AD:0405":["VMware_SVGA_II"]
+}